Insider Brief
- Quantinuum’s processors performed well in a study testing operations needed for quantum error correction, which also introduced a simpler way to assess hardware readiness.
- Helios-1 preserved meaningful results across three patterns of error checks involving up to 91 data qubits, while running more operations in parallel improved performance.
- The benchmark could help assess hardware improvements before full error-correction experiments, though further testing is needed to establish its reliability across larger systems.
PRESS RELEASE — Quantinuum’s processors handled a key step toward quantum error correction more reliably than the other machines in a new study, which also proposes a simpler way to judge whether hardware is ready for that step.
The study, posted on the preprint server arXiv, found that these measurements and the actions they triggered introduced substantially less additional error on Quantinuum’s machines. Its newer Helios-1 processor also performed well in tests modeled on a widely studied error-correction approach, with the researchers needing relatively few test runs — running each test circuit just 50 times — to detect the improvement.
Helios-1 retained meaningful results in larger tests built around three families of error-correction codes, including one involving 91 data qubits. Those experiments tested whether the processor could carry out demanding patterns of operations without errors overwhelming its output. They did not demonstrate successful error correction at those sizes.
The findings come from a comparison of 10 processors from Quantinuum, IBM and IQM by J. A. Montañez-Barrera and Kristel Michielsen of Germany’s Jülich Supercomputing Centre. Michielsen is also affiliated with the University of Cologne.
The researchers developed a benchmark designed to measure how well quantum computers perform the operations behind error correction before committing to full experiments with protected quantum information. A separate test on IBM’s Phoenix processor found that areas scoring better in the benchmark generally performed better when storing an error-corrected quantum state.
The results suggest that the method could help evaluate hardware improvements, identify more reliable areas of a chip and determine whether changes in how operations are scheduled improve performance.
Quantinuum’s Results
The key comparison examined what happens when a calculation requires measurements before it finishes.
Such measurements are essential to quantum error correction. They let a computer check for signs of errors and use the results to guide later operations. But — in another ironic twist of quantum computing — the checks can themselves introduce errors, disturb nearby qubits or leave other qubits waiting while the machine completes the work.
To estimate that additional burden, the researchers ran two versions of the same underlying task. The first one used measurements during computation and the follow-up actions they triggered, and the other did not have them.
On the IBM processors examined, the measurement-based versions had effective error rates roughly an order of magnitude higher than the corresponding versions without measurements, according to the study. On Quantinuum’s processors, the additional errors associated with measurements were comparable in scale to those arising from operations connecting two qubits.
As mentioned, correcting quantum errors requires repeated checks. A processor must be able to perform those checks while preserving the information they are intended to protect.
Quantinuum’s Helios-1 also showed solid performance in tests based on a surface code, which protects information through checks arranged across a lattice of qubits.
With 25 data qubits, Helios-1 scored higher at every circuit depth examined in that comparison. The differences amounted to two to four standard deviations per data point, using 50 executions for each point, the researchers reported.
A separate comparison using 30-qubit chains pointed in the same direction but was less conclusive. Helios-1 had a lower estimated error rate, but the uncertainty was too large to establish an improvement from that measurement alone.
The larger code-based tests showed that Helios-1 could preserve useful output across several different patterns of error-correction operations, according to the researchers. For example, the experiments reached 81 data qubits for surface-code structures, 91 for triangular color-code structures and 48 for bivariate-bicycle structures, a family being studied to reduce the resources required for error correction.
Each places different demands on connections between qubits and on the order in which measurements can run.
In the 91-data-qubit color-code test, only seven of Helios-1’s 98 physical qubits remained available as helpers. The researchers therefore had to divide the required measurements into repeated batches. Despite that constraint, the results remained clearly above the random baseline.
Larger Tests Reveal Scheduling Limits
The results also hint at the need for continued improvement because strong performance in a small experiment may not settle how a machine will perform at larger scales.
On Helios-1, the estimated additional cost of measurements increased as the researchers tested longer chains of qubits. The study linked that behavior to the processor’s limits on simultaneous operations.
Helios-1 has eight zones where two-qubit operations and measurements can take place. A long sequence involving many qubits cannot complete all its measurements at once, leaving some qubits idle while others are processed.
Those waits can affect the final result, according to the paper.
The researchers demonstrated that changing the schedule could improve performance. Their first Helios-1 experiments carried out many operations sequentially. They later revised the implementation to run more two-qubit operations and measurements in parallel, and the benchmark registered a clear improvement.
That finding gives the test a use beyond comparing processors. It could help researchers determine whether a different arrangement of operations makes better use of the same hardware.
The study also found improvements between generations of IBM and IQM processors in smaller tests. IBM’s Boston generally performed better than Kingston, while IQM’s Emerald improved on Garnet.
However, the researchers cautioned that changes in architecture can complicate comparisons. IBM’s move to the square-lattice arrangement used by Phoenix changed both connectivity and how circuits were mapped to the chip.
A Simpler Error-Correction Readiness Test
The results came from a benchmark designed to assess how well a quantum processor handles the repeated checks needed to protect information from errors. It sounds much simpler than it is in practice.
Quantum error correction spreads information across multiple physical qubits to create a protected unit called a logical qubit. The computer repeatedly checks for signs of errors without directly reading the information it is trying to preserve.
Helper qubits perform those checks. The machine must measure them, prepare them for reuse and, when required, use the results to control subsequent operations.
Testing the complete process can require considerable computing time and specialized software to interpret the error signals. The researchers designed their benchmark as a less demanding preliminary assessment.
It uses a version of the quantum approximate optimization algorithm, or QAOA, which searches for good solutions to mathematical problems. The team constructed those problems so that solving them requires connections and measurements resembling those used by selected error-correction codes.
Adding layers to the calculation puts the hardware through repeated sequences of operations. Researchers can then measure how quickly the quality of its solutions deteriorates.
For the code-based problems examined, a score of 1 represents optimal solutions, while 0.5 is the result expected from random sampling. Results above that baseline show that the circuit still preserves useful algorithmic information.
The experiments ranged from small tests with two data qubits and a helper to larger circuits containing as many as 2,950 measurements during computation.
The benchmark does not actually correct errors in the way a complete protected-memory experiment does. Its purpose is to test how well the necessary operations work together.
Protected Memory and Remaining Limits
The researchers checked the benchmark’s practical value on IBM Phoenix by comparing it with actual error-corrected memory experiments across 11 areas of the chip.
Both tests used the same physical qubits and connections within the same experimental sessions. The memory experiments measured whether a logical qubit retained its information through repeated rounds of error checks.
Areas that performed better in the benchmark generally had fewer logical-memory errors.
In one comparison, the benchmark placed chip areas an average of 1.6 positions away from their ranking in the memory experiment. The hardware calibration measures examined missed by an average of 2.1 to 2.7 positions.
The advantage was smaller for another stored quantum state, where a measure of the worst two-qubit gate error performed nearly as well.
The memory experiments used 4,000 executions per test, compared with 1,000 for each corresponding benchmark point. An analysis using resampled data suggested that 500 benchmark executions could retain much of the ranking information available from 1,000.
That validation remains limited to small surface-code patches on one processor. Further work would be needed to establish whether the relationship holds for larger codes, other hardware and much lower logical error rates.
The effective error rates used in the study also summarize deterioration under a simplified noise model. They are not direct measurements of every physical error occurring inside a processor.
Hardware restrictions affected which experiments could run. IQM’s conditional-control rules prevented some larger measurement-driven tests, while the connections on IBM’s heavy-hex processors prevented direct implementation of the selected code structures without additional routing operations.
The researchers suggest that further tests will be needed before this kind of benchmark can stand in for full error-corrected experiments. However, it does offer an early look at the need for machines that can check themselves repeatedly without those checks wiping out the information, a capability reliable quantum computing will require.
For a deeper, more technical dive, please review the paper on arXiv. It’s important to note that arXiv is a pre-print server, which allows researchers to receive quick feedback on their work. However, it is not — nor is this article, itself — official peer-review publications. Peer-review is an important step in the scientific process to verify results.
