Insider Brief
- SEEQC announced the integration of its Digital Interface System with NVIDIA’s NVQLink, creating a fully digital connection between quantum processors (QPUs) and GPUs for scalable hybrid computing.
- The collaboration enables real-time, ultra-low latency communication that improves quantum error correction and quantum-AI performance, achieving microsecond-scale interface latency and high logical compute throughput.
- By replacing analog links with an all-digital architecture based on Single Flux Quantum logic, SEEQC and NVIDIA aim to overcome key bottlenecks in fault-tolerant quantum computing and advance hybrid quantum-classical supercomputing.
PRESS RELEASE — SEEQC today announced integration of SEEQC’s Digital Interface System with NVIDIA NVQLink, creating a fully digital link between Quantum Processing Units (QPUs) and GPUs.
Showcased by NVIDIA Group Product Manager for quantum computing Sam Stanwyck during NVIDIA GTC Washington D.C., this integrationallows SEEQC’s Digital Interface System to extract the enormous throughput requirements of QPUs, and draw on the incredible parallel operation capacity of NVIDIA accelerated computing via the NVIDIA NVQLink open architecture. NVQLink allows the tight integration of these two technologies, via real-time, ultra-low latency interfacing between all leading QPU architectures with NVIDIA GPUs, unlocking a new generation of scalable hybrid applications, including quantum-AI and large-scale Quantum Error Correction (QEC).
Last month, SEEQC, with NVIDIA, demonstrated the first Digital Interface System based on SEEQC’s all-digital link protocol, achieving state-of-the-art performance with microsecond-scale interface latency and sub-100-microsecond logical compute throughput, powered by decoders in the NVIDIA CUDA-Q platform.
“Supported by our close collaboration with NVIDIA, SEEQC is moving beyond today’s brute-force approaches to deliver scalable quantum data centers capable of supporting real-world workloads,” says John Levy, CEO of SEEQC.
SEEQC’s collaboration with NVIDIA delivers a new approach to scaling quantum computing— replacing analog interfaces of competing interface systems with an all-digital connection between quantum and classical processors. This digital interface cuts logical data bottlenecks from QPUs by over 1,000× while enabling microsecond operation. Using NVQLink uniquely positions SEEQC to overcome the core latency and throughput bottlenecks that limit fault-tolerant quantum computing, and establish a clear technological lead over competing solutions that rely on analog-based systems.
“Combining the state of the art in quantum and classical compute is crucial for allowing real-time operation of the error corrected, logical qubits that are defining the next generation of quantum accelerated computers,” says Tim Costa, General Manager for Quantum at NVIDIA. “SEEQC’s integration of NVIDIA NVQLink enables the high-performance computing infrastructure integration necessary to bridge quantum and classical systems for next-generation supercomputers.”
At the heart of SEEQC’s Digital Interface System is the company’s quantum computing-on-a-chip architecture, powered by ultra-fast, energy-efficient Single Flux Quantum (SFQ) logic operating above 20 GHz. This digital backbone delivers billion-fold efficiency gains over competing chip technologies and a clear path toward sub-1-microsecond latency for QPU-GPU communication, which is critical to eliminating error detection backlogs that result in slow and inefficient error correction.
By seamlessly integrating with NVIDIA’s high-throughput NVQLink architecture, the SEEQC platform will deliver the performance, scalability, and reliability required for practical, fault-tolerant quantum computing—advancing the industry beyond the limits of hybrid analog systems.
