French Team Building a Prototype Interposer for Quantum and Control Chips Integration at Very Low Temperatures

French Scientists are Building a Prototype Interposer for Quantum and Control Chips Integration at Very Low Temperatures — French scientists have created a platform to optimize control and readout of qubits by placing control electronics near quantum chips without wire. Bonding.

A team of French scientists has started to build a prototype interposer that meets requirements of quantum computing by allowing integration and testing of both quantum and control chips fabricated from different materials and technologies and coming from different partners, according to a news release.

Known as QuIC³, which stands for quantum integrated circuits with CryoCMOS, the prototype demonstrator controls quantum chips by embedding control electronics near the quantum chip inside a dilution cryostat at T<1K. This temperature range is required for reliable operation of qubits, the fundamental or logic units of quantum computers. The demonstrator is made from an interposer in silicon on which quantum chips and control electronics are integrated by 3D flip-chip processes. The control electronics are fabricated on standard FDSOI 28nm-node technology and manufactured by STMicroelectronics.

The team included scientists at CEA-Leti, CEA-List and Néel Institute at the French National Centre for Scientific Research (CNRS).

“Realization of a QuIC3 demonstrator for 3D co-integration of quantum chips with CryoCMOS FDSOI 28nm control chips is an important step toward a full quantum computing system that operates at a very low temperature, less than 1 K, with optimum control and reading performance,” said Maud Vinet, head of CEA-Leti’s quantum computing program. The interposers’ primary purpose is to accommodate and connect quantum chips containing qubits and control chips, and to address and read the qubits, with two metal levels on the front side of the interposers. Additional on-chip circuits integrated on the interposer provide alternative reading options of information stored in the qubits. To further improve the interposer, passive elements and filter devices could be integrated on subsequent versions. The QUI1 (Quantum Interposer n°1) mask set used to build the first interposer was designed during the Covid-19 confinement period by pooling the expertise of CEA-Leti, CEA-List and Néel Institute at CNRS.“This interposer breakthrough is a unique combination of expertise on quantum physics, 3D technologies, material integration, IC interface, passives design and micro-architecture to achieve a solution adapted to quantum computation,” Vinet said. “The platform optimizes the control and readout of qubits by bringing the control electronics to the vicinity of the quantum chip without wire bonding.”

“This interposer breakthrough is a unique combination of expertise on quantum physics, 3D technologies, material integration, IC interface, passives design and micro-architecture to achieve a solution adapted to quantum computation.”

This proximity of the control electronics and the qubits increases the number of qubits that can be controlled, because it avoids the limitation on the number of lines of the cryostat. Wire bonding is not necessary because the qubits and control electronics are coupled by routing lines on the interposer, which reduces parasitic capacitance and inductance that complicate measurements.

The platform created by the interposer also can allow thermal decoupling of the quantum and control chips to keep the quantum chip at the lowest temperature possible.

In the coming months, the CEA-Leti, CEA-List and CNRS team will further investigate integration of superconducting elements to optimize the properties of passive elements. The collaboration will also include continued work on fabrication of the interposer, quantum chips and control-electronics chips. Once all the bricks are ready and assembled, the quantum and control chips will be flipped and hybridized on the interposer, followed by electrical measurements at low temperatures of the multi-chip assemblies. The final full interposer prototype is expected in 2021.

All of these elements aim to reach very large-scale integration of qubits,” Vinet added.

Next generations of the interposer will incorporate through silicon vias (TSV) to increase the connection density and eliminate wire bonding.

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