Insider Brief
- QC Design has published a paper describing Plaquette, its hardware-aware software platform for designing and evaluating fault-tolerant quantum computers.
- Plaquette models real hardware imperfections directly, allowing developers to estimate logical error rates without relying solely on simplified Pauli noise approximations.
- The framework was validated across superconducting, neutral-atom, and trapped-ion hardware models and is now available on arXiv.
Press release – QC Design today announced the publication of “Plaquette: A hardware-aware design platform for fault-tolerant quantum computers”, the paper presenting the theoretical framework and software suite behind its flagship product. The paper describes how Plaquette computes the logical performance of fault-tolerant architectures directly from the physics of a device’s actual imperfections, and is now available on arXiv.
Hardware teams designing fault-tolerant quantum computers lean on fast stabilizer simulators to decide which imperfections to fix first, and those simulators assume stochastic Pauli noise. Real devices do not behave that way: superconducting transmons leak out of the computational subspace, neutral-atom gates scatter through intermediate states, trapped ions heat as their motional modes absorb phonons, silicon spin qubits leak into valley states, and miscalibrated controls over-rotate coherently. The standard workarounds, such as Pauli twirling, depolarizing stand-ins, and hand-built noise models, demand expert effort per device and per noise process, and certify the abstraction rather than the device. The paper shows what this can cost: Clifford-only simulation can be overly optimistic by more than an order of magnitude in logical error rate.
Plaquette follows a different approach. A team specifies its hardware error model once, e.g., as Kraus operators, Hamiltonian-Lindblad dynamics, or an experimentally reconstructed quantum channel, and Plaquette compiles it automatically into the exact or approximate representation required by each of four sampler classes: Pauli-twirled stabilizer simulation, the new XPauli sampler for leakage and environment sectors, near-Clifford samplers for coherent errors, and full-state simulation for exact reference calculations, at scales up to tens of thousands of qubits.
The paper validates the XPauli and near-Clifford samplers against full-state simulation, which they match within statistical uncertainty even where Pauli twirling falls short, and demonstrates the framework on three hardware error models: leakage in superconducting qubits, intermediate-state scattering in neutral atoms, and heating in trapped ions.
Dr. Ish Dhand, co-founder and CEO of QC Design, said:
“Quantum computing makers are working on the same practical questions: Is my device below threshold, and by how much? Which imperfection is most important to suppress? What logical error rate will my FTQC deliver, and at what overhead? Answering these questions with Pauli approximations alone can be off by orders of magnitude. With Plaquette, teams describe the physics of their device once and get logical performance numbers they can trust, at the scale of full fault-tolerant architectures. This paper lays out the complete framework, and we are proud to share it with the community.”
The size of the discrepancy between Plaquette and Clifford-only simulations varies with platform and noise process, so reliable thresholds, error budgets, and overhead estimates require the most accurate simulation available. Plaquette provides a direct path from the open-system physics of a device to the logical performance of the fault-tolerant quantum computer built on it.
The paper is available on arXiv: https://arxiv.org/abs/2607.08767.
