Insider Brief:
- PQShield has developed the first fully functional post-quantum cryptography (PQC) silicon test chip, advancing industry compliance with new NIST PQC standards.
- The test chip, equipped with PQShield’s PQPlatform IP, allows for real-world testing of power usage, performance, and Side Channel Analysis (SCA) countermeasures.
- The chip’s firmware can be updated to meet evolving standards or enhance security against side-channel attacks, providing flexibility for future PQC developments.
- The RACCOON digital signature scheme is included in the chip, making this the first time it can be tested in silicon for post-quantum security.
PRESS RELEASE — PQShield has designed and built the first fully functional post-quantum cryptography silicon test chip to support compliance of the new NIST PQC standards. According to the release, the test chip provides semiconductor vendors with the tools needed to implement secure PQC solutions as the industry shifts from preparation to meeting compliance requirements. This enables detailed evaluation of power usage, performance, and Side Channel Analysis (SCA) countermeasures, all in a real-world environment.
The test chip is embedded with PQShield’s PQPlatform IP, as outlined in the release, making it fully equipped for platform security. These integrated components offer flexibility through firmware updates, making it easier to adapt to evolving standards or improve resistance to side-channel attacks. This combination of hardware and software co-design provides semiconductor vendors with a fully-packed toolkit as post-quantum cryptography moves from concept to deployment.
The PQPlatform IP includes a range of specialized features, each tailored to specific cryptographic needs:
- PQPlatform – Hash:
PQPlatform-Hash is a post-quantum hardware accelerator optimized for hash-based signature schemes like LMS and XMSS to provide support for signature generation and verification in embedded devices, especially where high throughput is needed.
- PQPlatform – Lattice:
PQPlatform-Lattice adds support for lattice-based cryptography, including ML-KEM and ML-DSA, using PQShield’s firmware to provide post-quantum security with minimal area and optional side-channel resistance.
- PQPlatform – CoPro:
PQPlatform-CoPro integrates post-quantum cryptography into existing security subsystems, using PQC operations and optional side-channel countermeasures, all managed by PQShield’s supplied firmware.
- PQPlatform – SubSys:
PQPlatform-SubSys is a cryptographic subsystem that independently handles post-quantum signature generation, verification, and secure key establishment, offloading these tasks from the main system processor.
Graeme Hickey, PQShield’s VP of Engineering, highlights the importance of the shift: “It’s no longer a PoC or a research item; it’s now something that’s a must-do, and I think we’re going to see an increase in interest from industry and companies looking to work out how to solve the post-quantum problem.”
According to PQShield, one of the standout features is the inclusion of the RACCOON digital signature scheme, a side-channel secure, masking-friendly solution designed for post-quantum environments. This is the first implementation of RACCOON in silicon, presenting an opportunity for testing and analysis.
As the demand for PQC compliance grows, PQShield’s test chip provides a practical tool for companies looking to secure their systems against potential quantum threats. By offering this technology, PQShield enables businesses to evaluate and implement post-quantum cryptography solutions in their silicon products, supporting long-term security and compliance with evolving standards.
