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Associate Professor Qing Cao holds a 200-mm wafer covered with multiple layers of vertically stacked silicon membranes. - TQI

University of Illinois Team Advances Monolithic 3D Chip Design

Insider Brief PRESS RELEASE — Researchers led by Illinois Grainger Engineering professor Qing Cao have demonstrated a scalable way...

  • Jun 1, 2026 · 10 min read
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