Insider Brief
- D-Wave has unveiled a gate-model quantum computing roadmap targeting a 100-logical-qubit fault-tolerant system capable of executing more than one million operations by 2032, with potential applications in quantum chemistry and quantum AI.
- The roadmap centers on D-Wave’s superconducting dual-rail qubit architecture, which is designed to detect approximately 90% of qubit errors during computation and reduce the physical-qubit overhead required for quantum error correction.
- Planned milestones include systems with 17 physical qubits in 2026, 49 physical qubits in 2027, 181 physical qubits in 2028, a 10-logical-qubit fault-tolerant system in 2030, and a 100-logical-qubit system by 2032.
PRESS RELEASE — D-Wave Quantum Inc. (NYSE: QBTS), (“D-Wave” or the “Company”), the only dual-platform quantum computing company providing both annealing and gate-model systems, software and services, today announced a new gate-model roadmap designed to accelerate the development of commercial, fault-tolerant quantum computing. Targeting 100 logical qubits capable of successfully performing over one million operations by 2032, the roadmap combines D-Wave’s expertise in high-coherence dual-rail qubits and quantum error correction, with its proven ability to engineer, scale and commercialize superconducting quantum systems.
“The industry has spent years talking about fault tolerance. We believe D-Wave has a highly differentiated and credible path to achieving it,” said Dr. Alan Baratz, CEO of D-Wave. “Our superconducting dual-rail architecture is a fundamentally different approach to fault-tolerant quantum computing that we expect will position D-Wave not only to compete, but also to redefine how quickly the technology becomes commercial.”
D-Wave believes the future of commercial gate-model quantum computing will be defined not by raw physical qubit counts alone, but by the ability to reliably execute large-scale computations for real-world applications. While much of the industry focuses on scaling physical qubits, D-Wave is pursuing a differentiated approach centered on reducing errors at the hardware level. Its dual-rail qubit architecture embeds error detection directly into the qubits, making errors detectable during computation at the single-qubit level. In contrast to many other gate-model hardware modalities that cannot detect qubit errors, D-Wave’s dual-rail qubits are designed to identify approximately 90% of errors as they occur to dramatically lower the number of physical qubits required to perform error correction. D-Wave has also demonstrated, with error detection, 99.9% two-qubit fidelities, meaning physical errors occur only about once in every 1,000 operations.
The roadmap, which will be shared in detail at D-Wave’s first-ever Investor Day today, outlines a progression of technical milestones designed to improve qubit fidelity, advance large-scale computations and support the development of commercially useful quantum applications. Key roadmap milestones include:
- 2026: Delivery of a 17-physical-qubit system that supports logical error rates 2 times lower than physical error rates
- 2027: Completion of a 49-phsyical-qubit system that can deliver an expected 20-fold error reduction factor over the physical error rate
- 2028: Completion of a 181-physical-qubit system that can deliver an expected 2,000-fold error reduction factor over the physical error rate, representing the scalable blueprint for fault-tolerant architectures
- 2030: Completion of a 10-logical-qubit system that can support the first fault tolerant algorithms
- 2032: Completion of a 100-logical-qubit system capable of successfully performing more than one million operations that can support initial quantum chemistry and quantum AI applications
D-Wave’s roadmap is built on superconducting technology, which can run quantum error correction cycles 100 to 1000 times faster than neutral atom or trapped ion systems. In addition, the Company views Lambda as a key metric that should be used to measure progress toward fault-tolerant quantum computing. Lambda is a measure of how rapidly a quantum computer’s errors are reduced as more error-correction capability is added. Today, the broader quantum computing industry has demonstrated Lambda values around 2, meaning each increment in error correction reduces errors by about half. D-Wave’s roadmap is targeting a Lambda of 10, a major leap the Company expects will reduce errors far more quickly, by a factor of 10 for each increment in error correction, making it possible to achieve fault-tolerant quantum computing with significantly fewer physical qubits.
Combined with D-Wave’s proprietary on-chip cryogenic control technology, proven superconducting systems expertise and production-ready quantum cloud infrastructure, the Company believes its dual-rail gate-model roadmap presents a fast, efficient, and achievable path to commercial gate-model quantum computing. With more than 15 years of experience designing and building superconducting quantum computing systems, D-Wave has successfully delivered six generations of annealing quantum computers, culminating in its award winning Advantage2™ system. As the only provider of annealing and gate-model technologies, D-Wave is uniquely positioned to participate in the full addressable quantum computing market.
Learn more about D-Wave’s gate-model roadmap and technology here.
